Open AccessSurvey on Near-Data Processing: Applications and Architectures
Author(s) -
Paulo C. Santos,
Francis B. Moreira,
Aline Santana Cordeiro,
Sairo R. dos Santos,
Tiago Rodrigo Kepe,
Luigi Carro,
Marco A. Z. Alves
Publication year - 2021
Publication title -
jics. journal of integrated circuits and systems
Language(s) - English
Resource type - Journals
eISSN - 1872-0234
pISSN - 1807-1953
DOI - 10.29292/jics.v16i2.502
Subject(s) - computer science , bottleneck , latency (audio) , computer architecture , context (archaeology) , efficient energy use , energy consumption , embedded system , telecommunications , engineering , electrical engineering , paleontology , biology
One of the main challenges for modern processors is the data transfer between processor and memory. Such data movement implies high latency and high energy consumption. In this context, Near-Data Processing (NDP) proposals have started to gain acceptance as an accelerator device. Such proposals alleviate the memory bottleneck by moving instructions to data whereabouts. The first proposals date back to the 1990s, but it was only in the 2010s that we could observe an increase in papers addressing NDP. It occurred together with the appearance of 3D-stacked chips with logic and memory stacked layers. This survey presents a brief history of these accelerators, focusing on the applications domains migrated to near-data and the proposed architectures. We also introduce a new taxonomy to classify such architectural proposals according to their data distance.