Open AccessPWM output CMOS Stress Sensor based in PiezoFET current mirrors
Author(s) -
J. Bohorquez,
Fabiano Fruett
Publication year - 2019
Publication title -
jics. journal of integrated circuits and systems
Language(s) - English
Resource type - Journals
eISSN - 1872-0234
pISSN - 1807-1953
DOI - 10.29292/jics.v14i2.75
Subject(s) - piezoresistive effect , duty cycle , current mirror , stress (linguistics) , pulse width modulation , cmos , materials science , signal (programming language) , electronic engineering , electrical engineering , voltage , transistor , engineering , optoelectronics , computer science , linguistics , philosophy , programming language
This work shows the design and characterization of a stress sensor based on piezoFET current mirrors with a Pulse Width Modulated output, a compact device designed to be integrated in any CMOS process which is suitable to estimate the stress state over the silicon surface. The multi-terminal device integrates the piezo-MOSFETs with different alignments within current mirrors with the bias circuits to extract differential currents, which are related to the different stress components at the surface of the device. The analog current outputs are converter into single-bit digital signal using a Pulse Width modulator. In the absence of stress, the duty cycle of the output is 50%, but if stress is applied, the mismatches in the currents generate a shift in the duty cycle proportional to the stress. Since there are piezoFET aligned in different directions, it is possible to add the currents to isolate effect of the different stress components. The piezoFET current mirrors and the PWM stress sensor were characterized using a four-point bending test; a controlled uniaxial stress in a range [5MPa, 70MPa] was applied aligned to the main crystallographic directions of the device surface, while both the currents at the piezoFET mirrors and the digital output are observed. The analog outputs show a linear behaviour with stress and fit the equations from the piezoresistive effect while the duty cycle of the digital output varies also linearly around the 50%.