Open AccessIMPLEMENTATION BASED ON 0.18 µM CMOS TECHNIQUES FOR DIGITAL PLL SYNTHESIZER IN LOW LOCKING TIME
Author(s) -
Arvind Kumar,
Amit Kumar,
Vishal Ramola,
M. Tech Scholar
Publication year - 2020
Publication title -
international journal of engineering sciences and research technology
Language(s) - English
Resource type - Journals
ISSN - 2277-9655
DOI - 10.29121/ijesrt.v9.i9.2020.10
Subject(s) - phase locked loop , voltage controlled oscillator , pll multibit , computer science , cmos , frequency synthesizer , electrical engineering , electronic engineering , engineering , phase noise , voltage
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