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A COMBINED APPROACH TO CREATING MODELS FOR H-TYPE TRANSISTORS MADE USING 0.18 MICRON SOI TECHNOLOGY
Author(s) -
D. S. Shipitsin,
Alexander Potupchik,
G. Yu. Yashin
Publication year - 2020
Publication title -
international forum “microelectronics – 2020”. joung scientists scholarship “microelectronics – 2020”. xiii international conference «silicon – 2020». xii young scientists scholarship for silicon nanostructures and devices physics, material science, process and analysis
Language(s) - English
Resource type - Conference proceedings
DOI - 10.29003/m1614.silicon-2020/247-251
Subject(s) - silicon on insulator , transistor , parasitic capacitance , capacitance , type (biology) , electronic engineering , semiconductor device modeling , materials science , computer science , optoelectronics , electrical engineering , engineering , physics , silicon , cmos , voltage , quantum mechanics , geology , electrode , paleontology