
Hardware Implementation Of Line Clipping A lgorithm By Using FPGA
Author(s) -
Amar I. Dawod
Publication year - 2011
Publication title -
mağallaẗ tikrīt li-l-ʻulūm al-handasiyyaẗ/tikrit journal of engineering sciences
Language(s) - English
Resource type - Journals
eISSN - 2312-7589
pISSN - 1813-162X
DOI - 10.25130/tjes.18.3.10
Subject(s) - clipping (morphology) , computer science , field programmable gate array , computer hardware , bottleneck , line (geometry) , graphics , embedded system , computer graphics (images) , mathematics , philosophy , linguistics , geometry