Open AccessDesign and Analysis of 32-bit Parallel Prefix Adders for Low Power VLSI Applications
Author(s) -
S Daphni,
Kasinadar Sundari Vijula Grace
Publication year - 2019
Publication title -
advances in science technology and engineering systems journal
Language(s) - English
Resource type - Journals
ISSN - 2415-6698
DOI - 10.25046/aj040213
Subject(s) - adder , very large scale integration , arithmetic , prefix , computer science , bit (key) , parallel computing , power (physics) , power analysis , mathematics , algorithm , embedded system , telecommunications , physics , cryptography , linguistics , philosophy , quantum mechanics , latency (audio) , computer security
Accelerating Research
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom
Address
John Eccles HouseRobert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom