Open AccessFrequency Analysis of 32-bit Modular Divider Based on Extended GCD Algorithm for Different FPGA chips
Author(s) -
Qasem Abu Al-Hiaja,
Abdullah AlShuaibi,
Ahmad Al Badawi
Publication year - 2018
Publication title -
international journal of computer and technology
Language(s) - English
Resource type - Journals
ISSN - 2277-3061
DOI - 10.24297/ijct.v17i1.6992
Subject(s) - field programmable gate array , modular arithmetic , algorithm , multiplicative inverse , chinese remainder theorem , computer science , cryptosystem , modular design , euclidean algorithm , public key cryptography , cryptography , mathematics , inverse , computer hardware , encryption , geometry , operating system
Modular inversion with large integers and modulus is a fundamental operation in many public-key cryptosystems. Extended Euclidean algorithm (XGCD) is an extension of Euclidean algorithm (GCD) used to compute the modular multiplicative inverse of two coprime numbers. In this paper, we propose a Frequency Analysis study of 32-bit modular divider based on extended-GCD algorithm targeting different chips of field-programmable gate array (FPGA). The experimental results showed that the design recorded the best performance results when implemented using Kintex7 (xc7k70t-2-fbg676) FPGA kit with a minimum delay period of 50.63 ns and maximum operating frequency of 19.5 MHz. Therefore, the proposed work can be embedded with many FPGA based cryptographic applications.