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Designing A New Reversible Adder/Subtractor Circuit for Low Power ALU Application
Author(s) -
R. Anitha Disha A. Tiwade Disha A. Tiwade,
Tjprc
Publication year - 2019
Publication title -
international journal of semiconductor science and technology
Language(s) - English
Resource type - Journals
eISSN - 2278-9405
pISSN - 2250-1576
DOI - 10.24247/ijsstjun20192
Subject(s) - adder , subtractor , computer science , power (physics) , carry save adder , arithmetic , serial binary adder , parallel computing , physics , mathematics , telecommunications , latency (audio) , quantum mechanics

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