Open AccessANALYSIS OF EFFECTS OF USING 9/7 WAVELET COEFFICIENTS IN MULTI-RESOLUTION ANALYSIS
Author(s) -
Manish Sharma,
Sonu Lal
Publication year - 2016
Publication title -
smart moves journal ijoscience
Language(s) - English
Resource type - Journals
ISSN - 2582-4600
DOI - 10.24113/ijoscience.v2i1.68
Subject(s) - adder , field programmable gate array , computer science , subtraction , redundancy (engineering) , discrete wavelet transform , multiplication (music) , pixel , multiplier (economics) , wavelet , computer hardware , arithmetic , algorithm , wavelet transform , parallel computing , mathematics , artificial intelligence , telecommunications , combinatorics , economics , macroeconomics , operating system , latency (audio)
Conventional distributed arithmetic (DA) is popular in field programmable gate array (FPGA) design, and it features on-chip ROM to achieve high speed and regularity. In this paper, we describe high speed area efficient 1-D discrete wavelet transform (DWT) using 9/7 filter based new efficient distributed arithmetic (NEDA) Technique. Being area efficient architecture free of ROM, multiplication, and subtraction, NEDA can also expose the redundancy existing in the adder array consisting of entries of 0 and 1. This architecture supports any size of image pixel value and any level of decomposition. The parallel structure has 100% hardware utilization efficiency.