
Ultra-Low Power PLL Design and Jitter Anaylsis
Author(s) -
Fu Luo
Publication year - 2020
Language(s) - English
Resource type - Dissertations/theses
DOI - 10.23860/diss-luo-fu-2013
Subject(s) - phase locked loop , jitter , ring oscillator , power (physics) , pll multibit , electronic engineering , electrical engineering , relaxation oscillator , computer science , range (aeronautics) , integer (computer science) , electronic circuit , voltage controlled oscillator , engineering , physics , voltage , quantum mechanics , aerospace engineering , programming language