
A Novel Error Correction and Detection for 32 Bit Modified Han-Carlson Adder
Author(s) -
B. Ramachandran,
A. V. Subbarao,
R. Sambasivanayak
Publication year - 2016
Publication title -
international journal of advanced scientific technologies, engineering and management sciences
Language(s) - English
Resource type - Journals
ISSN - 2454-356X
DOI - 10.22413/ijastems/2016/v2/i12/41280
Subject(s) - adder , arithmetic , bit (key) , computer science , error detection and correction , algorithm , parallel computing , mathematics , telecommunications , computer security , latency (audio)