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Aging –Aware Multiplier with AHL using FPGA
Author(s) -
Zade Jyothi,
M. Tech,
B Malleshwari
Publication year - 2017
Publication title -
international journal of emerging engineering research and technology
Language(s) - English
Resource type - Journals
eISSN - 2349-4409
pISSN - 2349-4395
DOI - 10.22259/ijeert.0501003
Subject(s) - multiplier (economics) , field programmable gate array , computer science , embedded system , economics , keynesian economics

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