Open AccessHigh-Speed Hybrid Logic Full Adder Using High-Performance 10-T XOR-XNOR Cell Using 18-nm FinFET Technology
Author(s) -
Ms. K S Indrani,
Nadendla Sucharitha,
D N S S R V Praneeth,
Bojja Veera Sai Yogesh
Publication year - 2022
Publication title -
international journal for research in applied science and engineering technology
Language(s) - Uncategorized
Resource type - Journals
ISSN - 2321-9653
DOI - 10.22214/ijraset.2022.47245
Subject(s) - xnor gate , adder , computer science , serial binary adder , cmos , carry save adder , electronic circuit , arithmetic , cadence , logic gate , electronic engineering , computer hardware , electrical engineering , mathematics , engineering , algorithm , nand gate