
Transformer Based Cascaded Multilevel Inverter with Reduced Number of Switches
Author(s) -
T. Murali Mohan
Publication year - 2021
Publication title -
international journal for research in applied science and engineering technology
Language(s) - English
Resource type - Journals
ISSN - 2321-9653
DOI - 10.22214/ijraset.2021.38989
Subject(s) - total harmonic distortion , matlab , inverter , transformer , voltage , fast fourier transform , electronic engineering , computer science , mathematics , electrical engineering , engineering , algorithm , operating system
This project presents the simulation of “transformer based cascaded multilevel inverter with reduced number of switches” with R-load and. It has the advantages of reduced number of switches and dc sources compared to conventional configurations and consequently higher efficiency. The simulation is accomplished for one stage (3-level), two stage (5-level, 7- level, 9-level), three stage (7-level, 11-level, 15-level, 19-level, 27-level) and four stage (29-level, 31-level, 33-level, 35-level). And their performance is analysed in terms of THD (Total Harmonic Distortion) for output voltages and currents. The FFT (Fast Fourier Transform) analysis is used in order to evaluate the harmonic distortion. The simulation is carried out by using MATLAB/SIMULINK software. Index Terms: cascaded asymmetric multilevel inverter, transformer-based cascaded multilevel inverter, balance of power distribution.