Open AccessSimulation Analysis of Circuit and Designing of PCB Layout of a CMOS based NOR Logic Gate using Open-Source Software eSim
Author(s) -
Balakrishna Eppili
Publication year - 2021
Publication title -
international journal for research in applied science and engineering technology
Language(s) - English
Resource type - Journals
ISSN - 2321-9653
DOI - 10.22214/ijraset.2021.38727
Subject(s) - nand gate , cmos , nor gate , and or invert , logic gate , computer science , electronic engineering , nand logic , pass transistor logic , schematic , gate equivalent , electronic circuit , or gate , nor logic , node (physics) , transistor , and gate , logic family , logic synthesis , electrical engineering , engineering , gate oxide , digital electronics , voltage , structural engineering
There are various basic gates like NAND, NOR gates which are extensively used in the designing of the more complex circuits with use higher number of transistors such as MUXs, ADCs and any other circuits. In this paper, we have carried out the modelling of NOR gate at 130 nm technology, yet maintaining comparable performance than conventional CMOS NOR gate logic structure. The modelling includes schematics design and PCB layout design run of the above gates. Also, the simulation results of the gates are obtained at the same node with start time, step time, stop time, rise time, fall time and delay and power dissipation. In this all process have been carried out of a CMOS based NOR Logic Gate using Open-Source Software eSim. Keywords: Simulation, PCB, NOR, CMOS, eSim