Open AccessFinite State Machine based Programmable Memory Built-in Self-Test
Author(s) -
B V S Sai Praneeth
Publication year - 2021
Publication title -
international journal for research in applied science and engineering technology
Language(s) - English
Resource type - Journals
ISSN - 2321-9653
DOI - 10.22214/ijraset.2021.35875
Subject(s) - computer science , finite state machine , built in self test , embedded system , verilog , state (computer science) , controller (irrigation) , flexibility (engineering) , memory controller , computer hardware , parallel computing , algorithm , field programmable gate array , semiconductor memory , mathematics , statistics , agronomy , biology
We propose a methodology to design a Finite State Machine(FSM)-based Programmable Memory Built-In Self Test (PMBIST) which includes a planned procedure for Memory BIST which has a controller to select a test algorithm from a fixed set of algorithms that are built in the memory BIST. In general, it is not possible to test all the different memory modules present in System-on-Chip (SoC) with a single Test algorithm. Subsequently it is desirable to have a programmable Memory BIST controller which can execute multiple test algorithms. The proposed Memory BIST controller is designed as a FSM (Finite State Machine) written in Verilog HDL and this scheme greatly simplifies the testing process and it achieves a good flexibility with smaller circuit size compared with Individual Testing designs. We have used March test algorithms like MATS+, March X, March C- to build the project.