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VLSI Architecture of Encoding using Sols Technique for Reducing Power in DSRC
Author(s) -
K. Rathna Sree
Publication year - 2020
Publication title -
international journal for research in applied science and engineering technology
Language(s) - English
Resource type - Journals
ISSN - 2321-9653
DOI - 10.22214/ijraset.2020.6318
Subject(s) - dedicated short range communications , very large scale integration , computer science , architecture , encoding (memory) , computer architecture , power (physics) , embedded system , telecommunications , art , wireless , artificial intelligence , visual arts , physics , quantum mechanics

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