z-logo
open-access-imgOpen Access
Verification of Universal Memory Controller with Memory using System Verilog
Author(s) -
S P Vignesh
Publication year - 2020
Publication title -
international journal for research in applied science and engineering technology
Language(s) - English
Resource type - Journals
ISSN - 2321-9653
DOI - 10.22214/ijraset.2020.29895
Subject(s) - memory controller , computer science , verilog , controller (irrigation) , embedded system , computer hardware , arithmetic , semiconductor memory , mathematics , field programmable gate array , agronomy , biology

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here