Open AccessDesign and Simulation of Low Power 10T Full Adder using Cadence 16nM Technology
Author(s) -
J. Kamal Vijetha
Publication year - 2019
Publication title -
international journal for research in applied science and engineering technology
Language(s) - English
Resource type - Journals
ISSN - 2321-9653
DOI - 10.22214/ijraset.2019.7083
Subject(s) - cadence , adder , power (physics) , computer science , electronic engineering , engineering , telecommunications , physics , quantum mechanics , latency (audio)