Open AccessHybrid Model of 64- Bit Adders and Subtractors
Author(s) -
M. Hariesh Kumar
Publication year - 2018
Publication title -
international journal for research in applied science and engineering technology
Language(s) - English
Resource type - Journals
ISSN - 2321-9653
DOI - 10.22214/ijraset.2018.4766
Subject(s) - adder , bit (key) , computer science , arithmetic , parallel computing , mathematics , telecommunications , computer security , latency (audio)