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Design of Fault Tolerant Full Adder and Full Subtractor
Author(s) -
Rita Mahajan
Publication year - 2018
Publication title -
international journal for research in applied science and engineering technology
Language(s) - English
Resource type - Journals
ISSN - 2321-9653
DOI - 10.22214/ijraset.2018.4053
Subject(s) - adder , subtractor , arithmetic , computer science , fault tolerance , parallel computing , mathematics , telecommunications , distributed computing , latency (audio)

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