Open AccessPOGO PIN PARASITIC IMPEDANCE CHARACTERISATION AND INFLUENCE ON PMIC SEMICONDUCTOR EVALUATION PROCES
Author(s) -
D. B. Milošević,
Miodrag Arsić,
Dragan Denić,
Dragan Živanović
Publication year - 2016
Publication title -
facta universitatis. series: automatic control and robotics
Language(s) - English
Resource type - Journals
eISSN - 1820-6425
pISSN - 1820-6417
DOI - 10.22190/fuacr.v15i3.1936
Subject(s) - electrical impedance , insertion loss , computer science , terminal (telecommunication) , electronic engineering , electrical engineering , telecommunications , engineering