Open AccessDesign of Low Power and Area Efficient Carry Select Adder (CSLA) using Verilog Language
Author(s) -
G. Sreekanth,
Kethavath Jail Singh,
Neelapala Sai Sruthi
Publication year - 2016
Publication title -
international journal of advanced engineering research and science
Language(s) - English
Resource type - Journals
ISSN - 2349-6495
DOI - 10.22161/ijaers/3.12.16
Subject(s) - verilog , adder , carry (investment) , computer science , power (physics) , arithmetic , computer hardware , telecommunications , mathematics , field programmable gate array , business , physics , finance , quantum mechanics , latency (audio)
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