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FIELD-PROGRAMMABLE GATE ARRAY IMPLEMENTATION OF THE DYNAMIC TIME WARPING ALGORITHM FOR SPEECH RECOGNITION
Author(s) -
John Sahaya Rani Alex,
Mitali Bhojwani
Publication year - 2017
Publication title -
asian journal of pharmaceutical and clinical research
Language(s) - English
Resource type - Journals
eISSN - 2455-3891
pISSN - 0974-2441
DOI - 10.22159/ajpcr.2017.v10s1.19753
Subject(s) - dynamic time warping , computer science , dynamic programming , field programmable gate array , speech recognition , flexibility (engineering) , verilog , field (mathematics) , time to market , image warping , algorithm , pattern recognition (psychology) , artificial intelligence , computer hardware , programming language , mathematics , statistics , pure mathematics
Objective of this research is to implement a speech recognition algorithm in smaller form factor device. Speech recognition is an extensively used inmobile and in numerous consumer electronics devices. Dynamic time warping (DTW) method which is based on dynamic programming is chosen tobe implemented for speech recognition because of the latest trend in evolving computing power. Implementation of DTW in field-programmable gatearray is chosen for its featured flexibility, parallelization and shorter time to market. The above algorithm is implemented using Verilog on Xilinx ISE.The warping cost is less if the similarity is found and is more for dissimilar sequences which is verified in the simulation output. The results indicatethat real time implementation of DTW based speech recognition could be done in future.

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