Open AccessLow Power VLSI Implementation of Convolution Encoder and Viterbi Decoder using Verilog HDL
Author(s) -
Dasari Ramanna
Publication year - 2020
Publication title -
bioscience biotechnology research communications
Language(s) - English
Resource type - Journals
eISSN - 2321-4007
pISSN - 0974-6455
DOI - 10.21786/bbrc/13.13/25
Subject(s) - viterbi decoder , verilog , very large scale integration , computer science , convolution (computer science) , power (physics) , encoder , viterbi algorithm , decoding methods , computer hardware , embedded system , algorithm , field programmable gate array , artificial intelligence , artificial neural network , operating system , physics , quantum mechanics