Open AccessDesign of Reed-Solomon Encoder for Error Detection in DRAM Cells
Author(s) -
Prateek Asthana,
Gargi Khanna,
Sahil Sankhyan,
Tarun Chaudhary
Publication year - 2021
Publication title -
aijr proceedings
Language(s) - English
Resource type - Conference proceedings
ISSN - 2582-3922
DOI - 10.21467/proceedings.114.70
Subject(s) - encoder , reed–solomon error correction , computer science , error detection and correction , finite field , operand , galois theory , binary number , arithmetic , computer hardware , multiplexer , parity bit , decoding methods , parallel computing , algorithm , multiplexing , concatenated error correction code , mathematics , discrete mathematics , block code , operating system , telecommunications
This paper investigates the design of Reed Solomon (RS) encoder. Based on the message symbols, the RS encoder generates the code-word. By carrying out a polynomial division using Galois Field algebra, the parity symbols are calculated. Reed-Solomon codes are one of the most effective and effective non-binary error codes to detect and correct burst errors. This is the focus work for my dissertation to implement RS encoder and decoder that is a complex algorithm and it is used for the reliable memory operation in a system. The RS Encoder and decoder are design in structural modeling and develop the hardware. The sift and multiplier type divider is used for Encoder and Syndrome module design.