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Design and implementation of single precision floating point multiplier using vhdl on spartan
Author(s) -
Pooja Hatwalne,
Ameya Deshmukh,
Tanmay Paliwal,
Krupal Lambat
Publication year - 2017
Publication title -
international journal of latest trends in engineering and technology
Language(s) - English
Resource type - Journals
eISSN - 2319-3778
pISSN - 2278-621X
DOI - 10.21172/1.83.040
Subject(s) - spartan , vhdl , multiplier (economics) , computer science , computer hardware , floating point , field programmable gate array , arithmetic , mathematics , programming language , economics , macroeconomics

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