Open AccessDesign and implementation of time efficient floating point multiplier using vhdl
Publication year - 2017
Publication title -
international journal of latest trends in engineering and technology
Language(s) - English
Resource type - Journals
eISSN - 2319-3778
pISSN - 2278-621X
DOI - 10.21172/1.83.011
Subject(s) - vhdl , multiplier (economics) , computer science , arithmetic , computer hardware , parallel computing , mathematics , field programmable gate array , economics , macroeconomics