Open AccessDesign and construction of Video extractor
Author(s) -
Baghdad Science Journal
Publication year - 2008
Publication title -
mağallaẗ baġdād li-l-ʿulūm
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.167
H-Index - 6
eISSN - 2411-7986
pISSN - 2078-8665
DOI - 10.21123/bsj.5.1.121-124
Subject(s) - multiplexer , extractor , signal (programming language) , multiplexing , sampling (signal processing) , filter (signal processing) , line (geometry) , engineering , electronic engineering , electrical engineering , computer science , mathematics , geometry , process engineering , programming language
Design and construction of video extractor circuit require an understanding of several parameters, which include: Selector circuit, extracting circuit which contains sampling signal and multiplexing. At each radar pulse, the video signal is fed to one of the selector. The fast filter has a pass –band from 190 Hz to 1800 Hz. These frequencies correspond to targets having radial velocities laying between and 10 Kph and 200 Kph.Slow filter: 60 Hz to 230 Hz for radial velocities laying between 3.5 and 13 Kph.The video- extractor is organized in four PCB CG (A-B-C-D) each one having 16 selector. The sampling signal (ADS) (1-2-3-4) control the 4-line-to-16-line decoders. 8 multiplexers of 8 inputs each, are required for the multiplexing of the 64 selectors.