Open AccessDESIGN OF LOW POWER & HIGH SPEED 8-BIT WALLACE TREE MULTIPLIER USING 10T FULL-ADDER
Publication year - 2017
Publication title -
international journal of advance engineering and research development
Language(s) - English
Resource type - Journals
eISSN - 2348-6406
pISSN - 2348-4470
DOI - 10.21090/ijaerd.35471
Subject(s) - adder , multiplier (economics) , bit (key) , computer science , arithmetic , carry save adder , power (physics) , electronic engineering , electrical engineering , mathematics , telecommunications , engineering , physics , computer network , economics , quantum mechanics , macroeconomics , latency (audio)
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