
DESIGN AND IMPLEMENTATION OF LOW POWER HIGH-SPEED 16-BIT ARITHMETIC UNITS USING DIFFERENT MULTIPLIERS IN CADENCE VIRTUOSO USING 45NM TECHNOLOGY
Publication year - 2017
Publication title -
international journal of advance engineering and research development/international journal of advance engineering and research development
Language(s) - English
Resource type - Journals
eISSN - 2348-6406
pISSN - 2348-4470
DOI - 10.21090/ijaerd.27587
Subject(s) - cadence , bit (key) , computer science , 4 bit , arithmetic , power (physics) , computer hardware , computer architecture , electronic engineering , mathematics , engineering , cmos , computer network , physics , quantum mechanics