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Synthesis of easily testable logic networks under one-type stuck-at faults at inputs and outputs of gates
Author(s) -
Кирилл Андреевич Попков
Publication year - 2018
Publication title -
preprint/preprinty ipm im. m.v. keldyša
Language(s) - English
Resource type - Journals
eISSN - 2071-2901
pISSN - 2071-2898
DOI - 10.20948/prepr-2018-87
Subject(s) - arithmetic , computer science , type (biology) , mathematics , geology , paleontology

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