Open AccessDecreasing the total number of logic elements in the classis two-step multiplier with a help of Vivado HLS
Author(s) -
Olha Sholohon,
Yuliia Sholohon
Publication year - 2016
Publication title -
information technology and security
Language(s) - English
Resource type - Journals
eISSN - 2518-1033
pISSN - 2411-1031
DOI - 10.20535/2411-1031.2016.4.2.109997
Subject(s) - vhdl , computer science , computer architecture , embedded system , field programmable gate array