Open AccessDevelopment of a software simulator of networks on a chip
Author(s) -
Д А Феськов,
A. Yu. Romanov
Publication year - 2011
Publication title -
èlektronika i svâzʹ
Language(s) - English
Resource type - Journals
eISSN - 2312-1807
pISSN - 1811-4512
DOI - 10.20535/2312-1807.2011.16.4.244574
Subject(s) - multiprocessing , network on a chip , computer science , computer architecture simulator , embedded system , software , computer architecture , architecture , chip , system on a chip , operating system , telecommunications , art , visual arts
The article presents the concept of networks-on-chip (NoC) as a promising alternative to communication subsystem for multiprocessor systems with bus architecture. The networks simulator developed as a necessary software tool to evaluate NoC performance parameters. Its possibilities are considered and the results of its approbation are given