
Implementation of High Speed Pipelined Distributed Arithmetic Based FIR Filter
Author(s) -
P. L. Joseph Raj
Publication year - 2015
Publication title -
research journal of applied sciences, engineering and technology
Language(s) - English
Resource type - Journals
eISSN - 2040-7467
pISSN - 2040-7459
DOI - 10.19026/rjaset.11.2247
Subject(s) - computer science , finite impulse response , digital signal processing , computer hardware , very large scale integration , multiplication (music) , filter (signal processing) , digital signal processor , multiplier (economics) , digital filter , arithmetic , parallel computing , embedded system , algorithm , mathematics , combinatorics , economics , computer vision , macroeconomics