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Low‐temperature sputtered mixtures of high‐κ and high bandgap dielectrics for GIZO TFTs
Author(s) -
Barquinha Pedro,
Pereira Luis,
Gonçalves Gonçalo,
Martins Rodrigo,
Fortunato Elvira,
Kuscer Danjela,
Kosec Marija,
Vilà Anna,
Olziersky Antonis,
Morante Juan Ramon
Publication year - 2010
Publication title -
journal of the society for information display
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.578
H-Index - 52
eISSN - 1938-3657
pISSN - 1071-0922
DOI - 10.1889/jsid18.10.762
Subject(s) - materials science , amorphous solid , dielectric , subthreshold slope , threshold voltage , optoelectronics , thin film transistor , band gap , crystallite , high κ dielectric , semiconductor , transistor , composite material , voltage , layer (electronics) , electrical engineering , metallurgy , crystallography , chemistry , engineering
— This paper discusses the properties of sputtered multicomponent amorphous dielectrics based on mixtures of high‐κ and high‐bandgap materials and their integration in oxide TFTs, with processing temperatures not exceeding 150°C. Even if Ta 2 O 5 films are already amorphous, multicomponent materials such as Ta 2 O 5 —SiO 2 and Ta 2 O 5 —Al 2 O 3 allow an increase in the bandgap and the smoothness of the films, reducing their leakage current and improving (in the case of Ta 2 O 5 —SiO 2 ) the dielectric/semiconductor interface properties when these dielectrics are integrated in TFTs. For HfO 2 ‐ based dielectrics, the advantages of multicomponent materials are even clearer: while HfO 2 films present a polycrystalline structure and a rough surface, HfO 2 —SiO 2 films exhibit an amorphous structure and a very smooth surface. The integration of the multicomponent dielectrics in GIZO TFTs allows remarkable performance, comparable with that of GIZO TFTs using SiO 2 deposited at 400°C by PECVD. For instance, with Ta 2 O 5 —SiO 2 as the dielectric layer, field‐effect mobility of 35 cm 2 /(V‐sec), close to 0 V turn‐on voltage, an on/off ratio higher than 10 6 , a subthreshold slope of 0.24 V/dec, and a small/recoverable threshold voltage shifts under constant current ( I D = 10 μA) stress during 24 hours are achieved. Initial results with multilayers of SiO 2 /HfO 2 —SiO 2 /SiO 2 are also shown, allowing a lower leakage current with lower thickness and excellent device performance.