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Passivation of ZnO TFTs
Author(s) -
Mourey Devin A.,
Burberry Mitchell S.,
Zhao Dalong A.,
Li Yuanyuan V.,
Nelson Shelby F.,
Tutt Lee,
Pawlik Thomas D.,
Levy David H.,
Jackson Thomas N.
Publication year - 2010
Publication title -
journal of the society for information display
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.578
H-Index - 52
eISSN - 1938-3657
pISSN - 1071-0922
DOI - 10.1889/jsid18.10.753
Subject(s) - passivation , materials science , thin film transistor , grain boundary , doping , optoelectronics , hysteresis , transistor , polycrystalline silicon , condensed matter physics , voltage , nanotechnology , layer (electronics) , composite material , electrical engineering , microstructure , physics , engineering
— The impact of passivation processes on ZnO thin‐film transistors is reported. In general, passivation processes result in back‐channel doping, which corresponds to shifts in threshold voltage and changes in subthreshold slope. It was determined that ALD‐based passivation results in considerably smaller undesirable shifts than those observed with plasma‐based processes. Two approaches, one a bulk doping with ammonia and the other a surface treatment with hydrogen peroxide, to further mitigate the detrimental effects of the passivation process are described. After proper passivation, ZnO devices show negligible hysteresis, have excellent stability to bias stress, and maintain or improve the good transport properties of as‐deposited devices. Although the existence of grain boundaries has been assumed to be a point of concern for device stability in polycrystalline metal oxides, no evidence was found to suggest that the grain boundaries present in these ZnO thin‐film transistors have affected the device stability.