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Instability dependent upon bias and temperature stress in amorphous‐indium gallium zinc oxide (a‐IGZO) thin‐film transistors
Author(s) -
Choi KwangIl,
Nam DongHo,
Park JeongGyu,
Park SungSu,
Choi WonHo,
Han InShik,
Jeong JaeKyeong,
Lee HiDeok,
Lee GaWon
Publication year - 2010
Publication title -
journal of the society for information display
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.578
H-Index - 52
eISSN - 1938-3657
pISSN - 1071-0922
DOI - 10.1889/jsid18.1.108
Subject(s) - materials science , thin film transistor , threshold voltage , amorphous solid , stress (linguistics) , optoelectronics , instability , transistor , indium , gallium , negative bias temperature instability , oxide , layer (electronics) , voltage , electrical engineering , nanotechnology , chemistry , metallurgy , linguistics , philosophy , physics , engineering , organic chemistry , mechanics
Abstract— The effects of gate‐bias stress, drain‐bias stress, and temperature on the electrical parameters of amorphous‐indium gallium zinc oxide (a‐IGZO) thin‐film transistors have been investigated. Results demonstrate that the devices suffer from threshold‐voltage instabilities that are recovered at room temperature without any treatments. It is suggested that these instabilities result from the bias field and temperature‐assisted charging and discharging phenomenon of preexisting traps at the near‐interface and the a‐IGZO channel region. The experimental results show that applying a drain‐bias stress obviously impacts the instability of a‐IGZO TFTs; however, the instability caused by drain bias is not caused by hot‐electron generation as in conventional MOSFETs. And the degradation trend is affected by thermally activated carriers at high temperature.