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40.4: Invited Paper : iDP Standard for an Internal Connection in a Large‐screen Display
Author(s) -
Kobayashi Alan,
Choi Jason,
Lee HeeSub,
Kim Changgon,
Lee Buyeol,
Park Dongwon
Publication year - 2011
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.3621387
Subject(s) - bitstream , computer science , pixel , chip , computer hardware , channel (broadcasting) , microcontroller , chassis , data stream , rendering (computer graphics) , master clock , real time computing , engineering , telecommunications , jitter , computer graphics (images) , computer vision , decoding methods , structural engineering , clock signal
This paper provides for a technical overview of iDP (Internal DisplayPort) Standard Ver. 1.0. The iDP is an open industry standard developed for transporting a video pixel stream from a TV/monitor controller SOC (system on chip) to a TV/monitor panel TCON within a TV/monitor chassis. This standard leverages the proven DisplayPort technology at its simplest form. Targeted at replacing LVDS, the iDP consists of Main Link and HPD signal, operating without sideband channel. Instead of AUX CH of DisplayPort Standard, the iDP uses HPD pulse to coordinate Link Training; an iDP sink device asserts an HPD pulse to prompt an iDP source device to transmit Link Training patterns over Main Link. Nominal iDP link rate of 3.24Gbps/lane enables the transport of FHD240Hz video stream with the pixel bit depth of 30 bits per pixel over 8 lanes (or differential pairs), as opposed to 48 differential pairs of Quad LVDS link. The permitted number of lanes per bank k 1 to 16 lanes inclusive, and the permitted number of banks k 1 or more, depending on a panel configuration. Using data throttling technique, an iDP source device enables an iDP sink device to regenerate the pixel clock synchronously from a link symbol clock as in f_pixel_clock = f_LinkSymbolClock * Mvid /48, where Mvid is an 8‐bit integer value, thus allowing for further simplification of an iDP TCON implementation.