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P‐24: Low Power a‐Si:H TFT Gate Driver Circuit Employing Negative Turn Off Biasing
Author(s) -
Lee JaeHoon,
Bae YuHan,
Lee WheeWon,
Kim YoungSoo,
Song JunYong,
Hyun Youmee,
Cho DucHan,
Kim SungMan,
Kwon YeongKeun,
Kwon MinSung,
Moon SeungHwan,
Kim KyeongHyeon
Publication year - 2011
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.3621037
Subject(s) - thin film transistor , electrical engineering , voltage , power consumption , gate driver , biasing , materials science , power (physics) , optoelectronics , engineering , physics , nanotechnology , layer (electronics) , quantum mechanics
New a‐Si:H TFT gate driver circuit (ASG) for low power consumption is proposed and fabricated. For the first time, the proposed ASG can set TFT turn off voltage to the negative voltage rather than zero voltage that the conventional one uses, therefore, TFT leakage current can dramatically be reduced by 1/100. The size of TFT in new ASG, which discharges the leakage current, can be reduced so that the power consumption of new ASG is 43% of the conventional one.