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6.2: A 10 Bits Modified VCC Interpolation and DVO Correction by Drain Current Injection
Author(s) -
Lee Sungwoo,
Kim KiDuk,
Park KyuSung,
Park ChangByung,
Lee ByungHun,
Jeon JinYong,
Jung SeungChul,
Huh Jin,
Yang JunHyeok,
Kim HyunSik,
Cho GyuHyeong
Publication year - 2010
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.3500536
Subject(s) - interpolation (computer graphics) , computer science , amplifier , channel (broadcasting) , process (computing) , cmos , column (typography) , differential (mechanical device) , power consumption , electronic engineering , power (physics) , engineering , artificial intelligence , physics , telecommunications , motion (physics) , frame (networking) , quantum mechanics , aerospace engineering , operating system
A 10b modified VCC interpolation and DVO correction scheme is proposed. The proposed structure minimizes the needs for interpolation of LCD column driver IC. And additional part for 4 bits interpolation is only one differential pair, one tail current mosfet, and some logics compared with conventional railtorail buffer amplifier [1]. The proposed DVO correction scheme can improve the channel uniformity of column driver IC. So the further reduction of area is possible. The 90nm CMOS process is used for simulation and layout size is compared. The power consumption is 6uW per channel.