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P‐26: Self‐aligned Top‐gate ZnO Thin Film Transistor with Novel Al 2 O 3 /SiO 2 Gate Insulator Structure
Author(s) -
Chen Rongsheng,
Zhao Shuyun,
Zhou Wei,
Kwok Hoi Sing
Publication year - 2010
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.3499936
Subject(s) - materials science , thin film transistor , optoelectronics , transistor , sputtering , threshold voltage , gate dielectric , insulator (electricity) , subthreshold slope , layer (electronics) , thin film , voltage , electrical engineering , nanotechnology , engineering
A novel Al 2 O 3 /SiO 2 gate insulator structure is developed for realizing a high performance self‐aligned top‐gate ZnO thin film transistor. After the sputtering of ZnO thin film, an Al 2 O 3 protective layer is sputtered immediately on top of the ZnO layer in the same sputtering chamber without breaking the vacuum, which protects the surface of ZnO active layer from exposing to air or solution in the later process. with minimized charge trapping at the interface between the channel layer and the gate dielectric, the resulting transistor exhibits afield effect mobility of 27 cm 2 /Vs, a threshold voltage of 1.2 V, a subthreshold swing of 0.25 V/decade and an on/off current ratio of 10 6 . Good short channel characteristics are also obtained with a small shift of the threshold voltages and no degradation of subthreshold swing.