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P‐24: Self‐Aligned Metal Double‐Gate Low‐Temperature Poly‐Si TFTs on Glass Substrates
Author(s) -
Hara Akito,
Sato Tadashi,
Sato Yasuyuki,
Okuda Kenichi,
Hirose Kenta,
Kitahara Kuninori
Publication year - 2010
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.3499913
Subject(s) - materials science , thin film transistor , substrate (aquarium) , polycrystalline silicon , silicon , double gate , optoelectronics , metal , metal gate , transistor , nanotechnology , metallurgy , electrical engineering , gate oxide , mosfet , layer (electronics) , oceanography , engineering , voltage , geology
Self‐aligned top and bottom metal double‐gate n‐ and p‐ch low‐temperature polycrystalline silicon thin‐film transistors (TFTs) were fabricated at 550°C on a glass substrate; nominal field‐effect mobility of the TFTs was 635 cm 2 /Vs and 150 cm 2 /Vs for n‐and p‐ch, respectively, and the s‐value of both TFTs was 130 mV/dec.
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