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58.4: Invited Paper : Solution Assembly of Transistor Arrays Based on Sorted Nanotube Networks for Large‐Scale Flexible Electronic Applications
Author(s) -
LeMieux Melburne C.,
Roberts Mark,
Opatkiewicz Justin,
Bao Zhenan,
Patil Nishant,
Mitra Subhasish
Publication year - 2009
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.3256935
Subject(s) - carbon nanotube , nanotechnology , materials science , transistor , substrate (aquarium) , nanotube , scale (ratio) , key (lock) , computer science , electrical engineering , engineering , physics , oceanography , computer security , quantum mechanics , voltage , geology
The inability for controlled large‐scale assembly of single‐walled carbon nanotubes (SWNTs) represents the biggest obstacle for application of this superior nanoelectronic material. Our aim here is to develop not only a reliable approach to deposit SWNTs uniformly over a large area from solution, but also leads to a SWNT network with tunable reproducible topological and electronic properties. By controlling nanotube network characteristics with substrate surface chemistry, we demonstrate reproducible transistors over large scales from solution, which is key for integration onto disposable and flexible plastic surfaces.