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21.4: Zinc Indium Oxide Thin‐Film Transistors for Active‐Matrix Display Backplane
Author(s) -
Hoffman Randy,
Emery Tim,
Yeh Bao,
Koch Tim,
Jackson Warren
Publication year - 2009
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.3256765
Subject(s) - thin film transistor , materials science , active matrix , oxide thin film transistor , optoelectronics , plasma enhanced chemical vapor deposition , amorphous solid , backplane , transistor , dielectric , zinc , gate dielectric , nanotechnology , silicon , electrical engineering , crystallography , metallurgy , chemistry , layer (electronics) , engineering , voltage
We report on the development of low‐temperature gate dielectric materials for zinc indium oxide (ZIO) thin‐film transistors (TFTs). Several films, including ALD HfO 2 and PECVD SiN x (deposited at 175°C and 150°C, respectively), yield good TFT performance. Bias stress‐induced threshold shift for HfO 2 is quite small, however does not follow conventional trends associated with hydrogenated amorphous Si (a‐Si:H) TFTs; PECVD SiN x conversely, shows bias stress characteristics that conform reasonably to a model appropriate for a‐Si:H devices.
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