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P‐93: New Reset Waveform for High Speed Address under High Ambient Temperature in AC PDP
Author(s) -
Jang SooKwan,
Tae HeungSik
Publication year - 2009
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.3256585
Subject(s) - reset (finance) , waveform , voltage , materials science , electrical engineering , environmental science , engineering , financial economics , economics
Abstract Based on the assumption that the wall voltage variation affecting the address discharge delay is deeply related to the exo‐emission of the MgO surface especially under the high ambient temperature, the effects of two parameters such as the interval time between sustain‐ and reset‐period and the ramp‐up holding time of the reset period on the wall voltage variation during the address‐period are examined under the high ambient temperature in the 50‐in. ac‐PDP withfull‐HD resolution. As a result, the new reset waveform with optimal ramp‐up holding time is proposed for a high speed address under high ambient temperature.