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P‐41: An Area‐Efficient 12‐Bit Segmented DAC for LCD Driver ICs
Author(s) -
Huang ShuChuan,
Chou ChunHsien,
Mo ChiNeng,
Chang ShihMeng
Publication year - 2009
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.3256519
Subject(s) - bit (key) , computer science , power consumption , 8 bit , adder , 16 bit , computer hardware , resistor , digital to analog converter , capacitor , 12 bit , power (physics) , electronic engineering , electrical engineering , engineering , cmos , voltage , physics , computer security , quantum mechanics
A linear 12‐bit segmented digital‐to‐analog converter (DAC) has been designed for LCD driver ICs. The proposed architecture consists of three 4‐bit sub‐DACs and a switched‐capacitor adder. It requires only 48 references out from conventional 4096 resistor‐string taps, and the overall area of the DAC is reduced significantly without power consumption penalty.