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24.3: 32‐inch LCD TV Using Conventional PECVD Microcrystalline‐Silicon TFTs
Author(s) -
Peng YaHui,
Chen ChihHsien,
Chang ChanChing,
Lee YeongShyang,
Huang TzungShi,
Hou ChihYuan,
Huang KunFu,
Tseng YiYa
Publication year - 2008
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.3069662
Subject(s) - thin film transistor , materials science , plasma enhanced chemical vapor deposition , silicon , microcrystalline , substrate (aquarium) , layer (electronics) , crystallinity , chemical vapor deposition , microcrystalline silicon , optoelectronics , nanotechnology , crystalline silicon , composite material , crystallography , amorphous silicon , chemistry , oceanography , geology
A 32‐inch microcrystalline silicon thin film transistor liquid crystal display was manufactured on 1500×1850 mm 2 (G6) glass substrate. We have successfully deposited non‐porous and highly crystalline microcrystalline silicon film with interfacial treatment as the active channel layer for TFTs in such large size display. Microcrystalline silicon was deposited by a conventional (13.56 MHz) plasma‐enhanced chemical vapor deposition (PECVD) system, and the crystalline fraction is 60%. Crystalline fraction was successfully improved with optimized gas treatment on SiN x layer before μc‐Si:H film deposition. Microcrystalline silicon TFTs with interfacial modification have about 2.8 times and 4 times more on‐current than μc‐Si:H TFT without interfacial modification measured at room temperature and at −10°C, respectively. The μc‐Si:H film with good crystallinity used as the active channel layer will significantly improve the reliability of the microcrystalline silicon TFTs. Furthermore, during the bias‐temperature‐stress test (BTS), V TH shift for μc‐Si:H TFT with treatment after 3hr BTS test is only 1.3V while μc‐Si:H TFT without treatment has a V TH shift of 13V.