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P‐22: Electrical Stability of ZnO TFT during Gate‐Bias Stress
Author(s) -
Kim TaeHyun,
Kim ShoYeon,
Jeon JaeHong,
Choe HeeHwan,
Lee KangWoong,
Seo JongHyun,
Shin JaeHeon,
Park SangHee Ko,
Hwang ChiSun
Publication year - 2008
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.3069364
Subject(s) - thin film transistor , materials science , stress (linguistics) , optoelectronics , fabrication , layer (electronics) , composite material , medicine , linguistics , philosophy , alternative medicine , pathology
Abstract We fabricated TFTs with ZnO thin film as an active layer. Electrical bias stress test of ZnO TFT was also carried out. The results of stress test of ZnO TFT differed from those of a‐Si:H TFT. Therefore, the instability of ZnO TFT cannot be explained by conventional degradation mechanisms of a‐Si:H TFT. The variance of some factors in the fabrication process showed a certain trend in the results of bias stress. A possible mechanism of abnormal behavior under the gate bias stress was discussed.