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P‐20: High Integrated 10.2‐inch WVGA LTPS LCD Manufactured by PMOS Process
Author(s) -
Yang ShuHun,
Chen WeiCheng,
Lin HsiaoYi,
Lee ChingHone,
Lai Vincent,
Chiu ChaungMing,
Wang HungChi,
Lee ChunChi
Publication year - 2007
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.2785275
Subject(s) - pmos logic , application specific integrated circuit , cmos , integrated circuit , engineering , electronic engineering , computer hardware , electrical engineering , computer science , transistor , voltage
A high integrated 10.2‐inch WVGA LTPS LCDs with single‐chip ASIC and manufactured by PMOS process was developed. Level shifters, DC‐DC converters for gate driver with 2‐phase shift registers and forward/reverse scanning function and 1:6 demultiplexer for source driver were integrated on the glass. The ASIC includes timing controller and 400‐channel source driver. This architecture dramatically reduces cost with high mechanical robustness. Furthermore, the 6‐Mask PMOS process also improves the throughput and reduces yield loss in manufacturing due to less photo layers than CMOS one, especially for large panel size. Therefore, this 10.2‐inch panel is remarkable for high integration of PMOS LTPS design and the cost reduction